One example of a prior art MOS construction is an n-channel insulated gate bipolar transistor, of which FIGS. 2(a) and 2(b) illustrate fragmentary cross sections. FIG. 2(a) shows the edge termination structure of this construction, which is usually disposed on the outer periphery of a semiconductor substrate. FIG. 2(b) is a cross-sectional view principally depicting the gate electrode.
This n-channel insulated gate bipolar transistor is fabricated by the following process. First, an n.sup.+ buffer layer 2 and an n.sup.- bulk layer 3 are grown epitaxially on a p.sup.+ substrate 1 of silicon. An oxide film is formed thereon by thermal oxidation and the unwanted portions are removed by photolithography to create a field oxide film 4. Next, a thin gate oxide film 5 also is formed by thermal oxidation. Thereafter, polycrystalline silicon doped with an impurity such as phosphorous is deposited thereon by the CVD process and etched by photolithography to form a a gate layer 6, a first field plate 61, and a first drain plate 62.
In this configuration, the p-type base layer 7 and a drain contact layer 71 are formed simultaneously by ion implantation and thermal diffusion. The contact layer 71 is not always necessary, and in some cases may not be included. In other cases, it is an n.sup.+ layer. After an n.sup.+ source layer 8 is formed by ion implantation and thermal diffusion, an insulating film 9 is formed by the CVD process and photolithography, for example. A source electrode 11, a gate electrode 12 consisting of Al and Si, a second field plate 13, and a second drain plate 14 are formed by sputtering and photolithography, for example. A protection film 10 made from silicon nitride, for example, is formed by the CVD process and photolithography. A drain electrode 15 contacting the p.sup.+ substrate 1 is formed by depositing metal as a film by vapor deposition.
It is to be noted that this is only one example of the prior art techniques and that various other contructions are available. For example, a p.sup.+ layer that is deeper and more heavily doped than the p-type base layer 7 may be formed inside the base layer before or after the formation of the field oxide film 4.
In the above-described structure, the edge termination structure on the outer periphery consists of two stages of plate, i.e., field plate 61 and drain plate 62. The second field plate 13 and the second drain plate 14 may be formed separately from Al and Si. A guard ring making use of a p-type diffused layer may be employed. Both a guard ring and field plates may be used. Field plates and drain plates may be electrically connected using a layer of high resistance. Despite these variations however, the unit structure of any type of n-channel insulated gate bipolar transistor includes the gate layer 6 which is formed on the p-type base layer 7 via the gate oxide film 5, and the base layer 7 separating the n.sup.+ source layer 8 from the n.sup.- bulk layer 3. Generally, a plurality of such unit structures are arranged parallel. FIGS. 2(a) and 2(b) show the outer portions on which a number of unit structures are arranged.
In the prior art n-channel insulated gate bipolar transistor, a positive voltage is applied to the gate electrodes 12 of all the unit structures. The voltage is applied to the gate layer 6 on each p-type base layer. Electric current is caused to flow between the drain electrodes 15 and the source electrodes 11 or a negative voltage is applied to the gate electrodes 12 to cut off electric current or block the high voltage applied between the drain electrodes 15 and the source electrodes 11. In this way, the semiconductor device is used to control electric power.
The prior art insulated gate bipolar transistor described in conjunction with FIG. 2 is limited in its application, due to steps A in the outer portions of the numerous unit structures resulting from the difference in thickness between the gate oxide film 5 and the field oxide film 4. When the bipolar transistor is conducting, electric current is concentrated in these outer portions. When the transistor is not conducting, a strong electric field is applied to these regions. When an excessive voltage is applied to the bipolar transistor, avalanche current flows and also is concentrated in these regions. That is, the outer regions, which are exposed to the severest conditions, have the steps A of oxide film, which cause electric field concentration. The prior art n-channel insulated gate bipolar transistor is therefore not a rugged semiconductor device under higher voltage or current conditions. For example, when excessive current is cut off or excessive voltage is applied, the steps A of the oxide film often lead to destruction of the semiconductor device. This is greatly detrimental to the quality and reliability of the semiconductor device.
It is an object of the present invention to provide a MOS device in which electric field concentration due to steps between gate oxide film and adjacent field oxide film is not produced, and which offers high quality and high reliability.